The present invention relates to a product-sum calculation circuit constructed mainly of ROM (Read Only Memory) circuits.
In regard, to multimedia, compression and decompression of images are important. As a technique of the compression and decompression of images, there is a method using discrete cosine transform. In order to execute the discrete cosine transform, a product-sum calculation with a constant is required.
The method of executing the product-sum calculation by means of multipliers and adders is well known. In regard to the product-sum calculation of the discrete cosine transform, there is also known the method of achieving a product-sum calculation by recording an integral multiple value of a constant into a ROM (Read Only Memory) when one of a multiplier and a multiplicand is a constant, obtaining multiplication results from the ROM by connecting a variable to an address of the ROM and cumulatively summing up the multiplication results.
FIG. 7 shows a product-sum calculation circuit constructed of a register 501, ROMs 502, 503 and 504 and adders 507, 508 and 509.
Multipliers Xi (X0 through X8) are stored in the register 501. Locations in which multipliers X0, X1 and X2 are stored are connected to addresses A0, A1 and A2 of the ROM 502. Locations in which multipliers X3, X4 and X5 are stored are connected to the addresses A0, A1 and A2 of the ROM 503. Locations in which multipliers X6, X7 and X8 are stored are connected to the addresses A0, A1 and A2 of the ROM 504.
Signal lines for transmitting a signal CSELi (CSEL0, CSEL1, . . . ) for selecting a constant Ck (C0, C1, . . . , C16) which serves as a multiplicand are connected to addresses A3, A4, A5 and A6 of the ROM 502, ROM 503 and ROM 504. Then, the ROMs 502, 503 and 504 store therein zerofold, onefold, twofold, threefold, fourfold, fivefold, sixfold and sevenfold values Oj (O0, O1, . . . ) of the multiplicand Ck.
Then, this product-sum calculation circuit calculates the following product-sum calculation result Yi. EQU Yi=.SIGMA.Ck.multidot.Xi
As shown in FIG. 8, the ROM 502, ROM 503 and ROM 504 are designed so as to be able to select any one of sixteen multiplicands Ck (k=0, 1, . . . , 16) by the addresses A3, A4, A5 and A6. The ROMs 502 through 504 can select any one of the multipliers 0, 1, 2, 3, 4, 5, 6 and 7 by the addresses A0, A1 and A2.
For example, the multiplicand C0 is selected by the addresses (A6, A5, A4, A3)=(0, 0, 0, 0), the multiplier Xi=1 is selected by the addresses (A2, A1, A0)=(0, 0, 1) and the onefold value of C0 is outputted as Oj from the ROM 502. If the addresses (A6, A5, A4, A3)=(0, 0, 0, 0) and the addresses (A2, A1, A0)=(1, 0, 1), then the multiplicand C0 and the multiplier Xi=5 are selected, and the fivefold value of the multiplicand C0 is outputted as Oj from the ROM 502.
As described above, the ROMs 502 through 504 store therein the zerofold through sevenfold values of the multiplicand Ck, and by designating the multiplicand Ck and the multiplier Xi by the addresses A0 through A6, the multiplication result Ck.times.Xi=Oj of the multiplier Xi and the multiplicand Ck can be outputted.
In this product-sum calculation circuit, an adder 507 adds the output of the ROM 503 to the output of the ROM 502 by digitally shifting it in conformity with the output of the ROM 5O2 in a shifter 506. Then, the adder 508 adds the output of the adder 507 to the output of the ROM 504 which is digitally shifted in conformity with the output of the adder 507 in a shifter 506. Further, an adder 509 adds the output of the adder 508 to the output of a register 510 which is digitally shifted in conformity with the output of the adder 508 in a shifter 511. Through these operations, a product-sum calculation result Yi=.SIGMA.Ck.multidot.Xi is stored into the register 510, thereby attaining the product-sum calculation.
In regard to the 3-bit partial products ROMs 502, 503 and 504 of the prior art product-sum calculation circuit shown in FIG. 7, it is required to record for each constant Ck the zerofold value, onefold value, twofold value, threefold value, fourfold value, fivefold value, sixfold value and sevenfold value of the constant Ck as ROM data as shown in FIG. 8.
The above has the problem that the ROM size increases and the consumption power increases.
For example, in the product-sum calculation circuit provided with a 4-bit partial product ROM, it is required to record for each constant the zerofold value, onefold value, . . . , fourteenfold value and fifteenfold value of one constant in the ROM, and therefore, the ROM size further increases.